> 8 to 3 Priority encoder using Xilinx Software | Priority encoder Verilog Module program | VHDL - TECH UPDATE

# 8 to 3 Priority Encoder  Verilog Program

Depending upon the number of data input lines digital encoders produce outputs of 2-bit, 3-bit or 4-bit codes. An “n-bit” binary encoder has 2n input lines, for example, 4-to-2, 8-to-3 and 16-to-4 line configurations.

The Priority Encoder solves the problems of allocating a priority level to each input. when input with a higher priority is present, all the other inputs with a lower priority will be ignored.
The Priority encoders are available in standard IC form. TTL 74LS148 is an 8-to-3-bit priority encoder. It has eight active LOW (logic “0”) inputs and provides a 3-bit code of the highest ranked input at its output. Simply about Priority Encoder

### program code:

module encoder(
input [7:0]x,
input en,
output reg [2:0]y
);
always @ (x,en)
begin if(en==1'b0)
casex(x)
8'b00000001 : y = 3'b000;
8'b0000001x : y = 3'b001;
8'b000001xx : y = 3'b010;
8'b00001xxx : y = 3'b011;
8'b0001xxxx : y = 3'b100;
8'b001xxxxx : y = 3'b101;
8'b01xxxxxx : y = 3'b110;
8'b1xxxxxxx : y = 3'b111;
endcase
end
endmodule

### Test-bench:

module encoder1;

// Inputs
reg [7:0] x;
reg en;

// Outputs
wire [2:0] y;

// Instantiate the Unit Under Test (UUT)
encoder uut (
.x(x),
.en(en),
.y(y)
);

initial begin
// Initialize Inputs
x = 0;
en = 0;

// Wait for 100 ns for global reset to finish
#100;

// Add stimulus here
x = 8'b00000001;e=0;#100;
x = 8'b0000001x;e=0;#100;
x = 8'b000001xx;e=0;#100;
x = 8'b00001xxx;e=0;#100;
x = 8'b0001xxxx;e=0;#100;
x = 8'b001xxxxx;e=0;#100;
x = 8'b01xxxxxx;e=0;#100;
x = 8'b1xxxxxxx;e=0;#100;

end
endmodule

Output:-

8 to 3 Priority encoder using Xilinx Software | Priority encoder Verilog Module program | VHDL Reviewed by TECH UPDATE on January 15, 2019 Rating: 5